OR4E6-FPGA-EV【PDF 2/6 页】BOARD EVAL FOR ORCA OR4E6 FPGA

您好，
买卖IC网欢迎您。
请登录
免费注册

1页 [2页]3页 4页 5页 6页

ORCA Series 4

Product Brief

Field-Programmable Gate Arrays

January 15, 2002

Programmable Features (continued)

■

Improved built-in clock management with program-

mable phase-locked loops (PPLLs) provide optimum

■

New capability to (de)multiplex I/O signals:

— New double data rate on both input and output at

rates up to 350 MHz (700 MHz effective rate).

— New 2x and 4x downlink and uplink capability per

I/O (i.e., 50 MHz internal to 200 MHz I/O).

clock modi ? cation and conditioning for phase, fre-

quency, and duty cycle from 20 MHz up to 420 MHz.

Multiplication of the input frequency up to 64x, and

division of the input frequency down to 1/64x, is pos-

sible.

■

Enhanced twin-quad programmable function unit

(PFU):

— Eight 16-bit look-up tables (LUTs) per PFU.

— Nine user registers per PFU, one following each

LUT and organized to allow two nibbles to act

independently, plus one extra for arithmetic opera-

tions.

— New register control in each PFU has two inde-

pendent programmable clocks, clock enables,

local set/reset, and data selects.

— New LUT structure allows ? exible combinations of

LUT4, LUT5, new LUT6, 4 to 1 MUX, new

8 to 1 MUX, and ripple mode arithmetic functions

in the same PFU.

— 32 x 4 RAM per PFU, con ? gurable as single- or

dual-port. Create large, fast RAM/ROM blocks

(128 x 8 in only eight PFUs) using the SLIC

decoders as bank drivers.

■

New 200 MHz embedded quad-port RAM blocks,

two read ports, two write ports, and two sets of byte

lane enables. Each embedded RAM block can be

con ? gured as:

— 1-512 x 18 (quad-port, two read/two write) with

optional built in arbitration.

— 1-256 x 36 (dual-port, one read/one write).

— 1-1K x 9 (dual-port, one read/one write).

— 2-512 x 9 (dual-port, one read/one write for each).

— 2 RAMS with arbitrary number of words whose

sum is 512 or less by 18 (dual-port, one read/one

write).

— Supports joining of RAM blocks.

— Two 16 x 8-bit content addressable memory

(CAM) support.

— FIFO 512 x 18, 256 x 36, 1K x 9 or dual 512 x 9.

— Constant multiply (8 x 16 or 16 x 8).

— Dual-variable multiply (8 x 8).

■

— Soft-wired LUTs (SWL) allow fast cascading of up

to three levels of LUT logic in a single PFU

through fast internal routing, which reduces rout-

ing congestion and improves speed.

— Flexible fast access to PFU inputs from routing.

— Fast-carry logic and routing to all four adjacent

PFUs for nibble-, byte-wide, or longer arithmetic

functions, with the option to register the PFU

carry-out.

Abundant high-speed buffered and nonbuffered rout-

ing resources provide 2x average speed improve-

ments over previous architectures.

■

■

Embedded 32-bit internal system bus plus 4-bit par-

ity interconnects FPGA logic, microprocessor inter-

face (MPI), embedded RAM blocks, and embedded

standard cell blocks with 100 MHz bus performance.

Included are built-in system registers that act as the

control and status center for the device.

Built-in testability:

— Full boundary scan ( IEEE ? 1149.1 and Draft

1149.2 joint test access group (JTAG)).

— Programming and readback through boundary

scan port compliant to IEEE Draft 1532:D1.7.

— TS_ALL testability function to 3-state all I/O pins.

■

Hierarchical routing optimized for both local and glo-

— New temperature-sensing diode.

bal routing with dedicated routing resources. This

results in faster routing times with predictable and

ef ? cient performance.

■

New cycle stealing capability allows a typical 15% to

40% internal speed improvement after ? nal place

and route. This feature also enables compliance with

■

SLIC provides eight 3-statable buffers, up to 10-bit

decoder, and PAL ?-like and-or-invert (AOI) in each

programmable logic cell.

many setup/hold and clock-to-out I/O speci ? cations,

and may provide reduced ground bounce for output

buses by allowing ? exible delays of switching output

buffers.

2

Lattice Semiconductor

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

我的联系方式

*

*

*

相关PDF资料

ORT8850-FPSC-EV BOARD EVAL ORCA ORT8850 FPSC

OTX-ACC-KIT-HH-GRY COVER FOR OEM TRANSMITTER

P-2408H-CCT CONN PLUG 8POS JONES SOLDER

P-321-CCT CONN PLUG 21POS SOLDER MNT

P0304 DE2-70 CALL FOR ACADEMIC PRICING

P0305 KIT MAX II MICRO

P0528 BOARD DEV DE1 ALTERA

P100-001 ADAPTER DB9F TO DB25M 1'

相关代理商/技术参数

OR500LCDRM1U 制造商:Cyberpower Systems 功能描述:CyberPower Smart App Intelligent GreenPower UPS OR500RM1U

OR-50900053 制造商:ORTRONICS 功能描述:VERTICAL POWER STRIP

OR51132 制造商:OREM 功能描述:

OR-54-BN 制造商:SEALCON LLC 功能描述: 制造商:Sealcon USA 功能描述:

OR-55 制造商:IDEC Corporation 功能描述:Accessory; Lamp Holder; Rubber; 2.301 in. 制造商:IDEC Corporation 功能描述:REMOVAL TOOL LAMP TW SERIES 制造商:IDEC Corporation 功能描述:REMOVAL TOOL, LAMP, TW SERIES 制造商:IDEC Corporation 功能描述:REMOVAL TOOL, LAMP, TW SERIES; ;ROHS COMPLIANT: YES 制造商:IDEC Corporation 功能描述:Rubber Tool Makes Lamp/LED Removal Easier 制造商:IDEC 功能描述:light, accessary, tool, lamp, OR-55 制造商:IDEC CORPORATION 功能描述:Rubber Tool Makes Lamp/LED Removal Easier

OR-60400169 制造商:INDUSTRIAL WIRE 功能描述:WIRE

OR-60400426 制造商:ORTRONICS 功能描述:WIRE

OR-604004396 制造商:ORTRONICS 功能描述:HINGED WALL MOUNT BRACKET 3.5"H X 19"W X 6"D EIA PATTERN , BLACK